Integrated circuits form as a plurality of dies on a semiconductor wafer. Various process steps are performed on the semiconductor wafer, including: forming active areas within the semiconductor material by use of impurity doping and ion implantation; deposition and patterning of insulator layers; and forming conductor layers such as metallic layers. The insulator layers are formed over the semiconductor substrate, and between and surrounding the conductor layers, to provide electrical insulation between layers of conductors. The conductor layers include materials such as doped polysilicon, aluminum, gold and copper conductor layers. Another insulator layer is formed over the entire device and is referred to as the “passivation layer” or sometimes referred to as a “protective overcoat” or “PO” layer. The passivation layer provides electrical insulation as well as protection from moisture and other impurities that can corrode or adversely affect the conductors and the semiconductor substrate. The insulator layers are thin, brittle layers of dielectric materials that can be sometimes be considered ceramic materials, such as silicon dioxide, silicon nitride, silicon oxynitride, silicon carbide, and polyimide. A bond pad layer, typically of aluminum or another conductor, can be formed at the top of the uppermost insulator layer, and covered by the PO layer. The bond pads are then exposed by opening portions of the PO layer. Bond wires can be mechanically and electrically coupled to the bond pads to form terminals for the packaged integrated circuit when the integrated circuit die is completed as an integrated circuit. Solder balls, solder columns, solder bumps or other connectors can be used instead of bond wires or with bond wires to provide electrical terminals. Packaging material such as a mold compound can be applied to the individual dies or in a “wafer scale” process, prior to forming individual dies; the final package protects the integrated circuit die and the bond wires or solder balls from moisture and mechanical stress.
After the integrated circuits are completely manufactured but while the integrated circuits still reside on a single semiconductor wafer, the devices are separated one from another. This operation is referred to as “singulation” or “dicing” of the semiconductor wafer. Singulation of integrated circuit devices from a semiconductor wafer includes physically separating the devices by a sawing or scribing operation. Mechanical sawing or laser sawing cuts through the semiconductor wafer. The cuts are made in kerf lanes or scribe street areas that are defined between the integrated circuit dies. Sometimes singulation includes laser scribing followed by a mechanical breaking operation along a scribed area.
When the semiconductor wafer is sawed, chipping of the semiconductor wafer can occur. In a mechanical dicing operation, a rotating saw blade has to cut through the insulating layers, the conductor layers, and through the semiconductor wafer. The saw blade has significant vibration and heat is generated while the saw blade is rotating and cutting through these mechanically brittle layers. Use of thick metal layers to form bond or probe pads in the saw kerf lane has resulted in increased chipping and unwanted cracking in the semiconductor wafer during sawing. Cracked wafers result in a loss of finished integrated circuit devices, lowering yield and increasing per unit costs.
Scribe seals are used in order to protect the sensitive metal conductors and doped diffusion areas within the integrated circuit dies during singulation and to protect the completed integrated circuit die afterwards. A scribe seal is a structure usually formed at the periphery of the integrated circuit die and extending from the uppermost layer of conductor material through the insulating layers and to the surface of the semiconductor device. The scribe seal can include: conductor material from each layer of conductor metal; the conductive vias between layers; and the contact material to the semiconductor substrate to form a vertical structure that extends from the passivation layer to the semiconductor substrate and forms a metal seal from the passivation layer extending through the insulation layers to the semiconductor substrate.
Scribe seals form a barrier to ions and process contaminants that might otherwise migrate into the sensitive structures within the integrated circuit die, and form a barrier to moisture and contaminants that might otherwise affect the finished integrated circuit die. Scribe seal structures can include multiple scribe seals formed at the periphery of the integrated circuit die. The scribe seals can be formed in plural concentric scribe seals spaced a distance apart to further increase the effectiveness of the barrier to ion migration and moisture.